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According to a report from Wccftech, an unnamed Intel director states on the investment research platform Tegus, then shared by Tech Fund on X, that future high-end chip manufacturing will rely less on advanced lithography tools and more on etching technology. As indicated by the report, the director explains that emerging transistor architectures—such as gate-all-around FET (GAAFET) and complementary FET (CFET)—could significantly reduce reliance on lithography in the chipmaking process.
The report points out that although lithography machines—like ASML’s advanced EUV and high-NA EUV scanners—often dominate discussions due to export controls, chip manufacturing also relies on other key processes, such as deposition and etching. Lithography serves as the initial step, transferring circuit designs onto the wafer, which are then cemented through subsequent deposition and etching steps, the report notes.
While most current transistors use FinFET architecture, newer designs like GAAFET wrap the gate entirely around the transistor channel, with transistor groups arranged in parallel. More advanced architectures, such as CFET, go a step further by vertically stacking transistor groups to save wafer space. The report indicates that because both GAAFET and CFET surround the gate from all sides, precise lateral material removal is critical. As a result, this shift in architecture is prompting chipmakers to focus less on lithography and more on etching, according to the report.
Major Chipmakers Reportedly Delay Adoption of ASML’s High-NA EUV
Meanwhile, according to Wccftech, TSMC might delay its adoption of High-NA EUV, with the company expected to bypass the tool for its A14 process and instead continue using 0.33-NA EUV, a move revealed by Senior Vice President Kevin Zhang at the NA Technology Symposium and noted by BITS&CHIPS. Still, the report highlights that TSMC has not ruled out using High-NA EUV, with plans to adopt the technology for its A14P node.
In addition, according to South Korean media outlet The Bell, Samsung Electronics is reportedly also delaying the adoption of ASML’s high-NA EUV lithography equipment in their DRAM production, citing the steep cost of the tools and upcoming shifts in DRAM architecture.
Chinese Firms Advancing in Etching Tools
With China accelerating its push for semiconductor self-sufficiency, companies like Naura Technology, Huawei-linked SiCarrier, and etching equipment leader AMEC are rapidly gaining ground. Notably, according to Science and Technology Innovation Express News, amid market rumors that Huawei and SMIC have achieved 5nm chip production, AMEC Chairman Gerald Yin reportedly confirmed that such nodes can be reached using DUV lithography.
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(Photo credit: ASML)
